STA Engineer / Timing Lead

Job Title: STA Engineer / Timing Lead

Role Details:

• Location: Bengaluru, Karnataka
• Experience: 10–15 Years (Ideal: 8–12 years of dedicated STA/Timing Closure experience)
• Notice Period: 0–30 Days
• Budget: As per market
• Role Type: Permanent

Key Skills Required:

• Deep expertise in STA tools: PrimeTime, PT-DMSA (PTECO), Tempus, Tweaker
• Strong knowledge of timing corners/modes, MMMC, OCV/AOCV/POCV analysis
• High-frequency timing closure (GHz range) experience at block and full-chip level
• Full-chip STA closure: defining mode requirements and corners for signoff
• Strong understanding of DFT mode requirements for timing signoff
• Good understanding of physical design flow and ECO implementation
• Strong command of SDC constraints authoring and validation
• TCL scripting skills for flow automation (Mandatory)
• Signal Integrity (SI) — crosstalk delay/noise analysis experience (Preferred)

Ideal Profile Highlights:

• Experience working on advanced nodes (2nm/3nm/4nm preferred)
• Hands-on experience with automated and manual ECO generation and delivery
• Proven experience collaborating with PnR, constraints, and DFT teams