Senior Staff Engineer - DFT
Senior Staff Engineer - DFT
BitSilica10-12 Years
- Posted 20 days ago
- Be among the first 10 applicants
Job Description
- 10+ yrs of experience in DFT architecture, scan Insertion, compression at core level and SoC level.
- Experience in ATPG pattern generation, coverage analysis
- Experience with timing and no-timing simulations
- Experience in Memory-BIST
- Have understanding of SSN architecture, clock architecture, OCC
Location: Bangalore
More Info
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Key Skills
DFT architecture
Memory-BIST
ATPG pattern generation
compression at core level
SSN architecture
clock architecture
timing simulations
no-timing simulations
About Company
Skills:
occ, Memory-BIST, DFT architecture scan Insertion compression at core level and SoC level, SSN architecture, timing and no-timing simulations, clock architecture, ATPG pattern generation coverage analysis
Skills:
logic bist , DFT architecture, Functional BIST, Digital design flows, Scan compression, SoC MCU architecture, DFT protocols