lean engineering , Lean Product Development, CAD packages

Regression Analysis, C, Ethernet Protocols, Python, RTL simulation, Uvm, systemverilog, constrained-random verification, testbench architecture, waveform debug, SoC Verification, assertions, functional coverage

C, Perl, Python, Low power verification methods, FPGA emulator software environments, Emulation platforms, Uvm, systemverilog, Industry standard I/O interfaces, AMBA bus protocols, RTL development environments, Baremetal processor environments, Formal verification methods, UPF based low power verification, Transaction level modeling

manufacturing processes , assembly processes , product life cycle , Plm, project management, continuous Engineering process, tolerance stack-up analysis, materials selection, production costing, product design development, CAD Tools, quality value engineering, Creo, Pdm

bill of materials , Engineering Drawings, Digital analytics techniques, Gas Turbine mechanical design, FE analysis, Lifing techniques, Stack up calculations

Quality check of CAD data and drawings, Pneumatic systems, ANSI, Asme, engineering change management, DFA, Release process in PDM Database, Migration of CAD data to PDM, Materials DFM, Legacy conversion of 2D data to 3D, Bill Of Material, Mechanical design drafting, Manufacturing drawings creation, 3D CAD parts assemblies, FE Analysis

Version Control Systems, Tcl, Verilog, static timing analysis, Perl, Git, Shell, Perforce, Python, Scripting Languages, AHB, LEC, systemverilog, EDA Tools, LINT, Rtl Design, Synthesis, APB, Axi, SoC Architecture Design, SoC Integration, cdc, formal verification, AMBA protocols, Simulation